1. Field
Exemplary embodiments of the present invention relate to a majority decision circuit.
2. Description of the Related Art
A majority decision circuit compares two input data (digital signals of 1 bit or more data) to decide whether any one of the two input data has more bits having a specific logical value (for example, ‘1’ or ‘0’). As the majority decision circuit, there may be an analog majority decision circuit or a digital majority decision circuit.
FIG. 1 illustrates a configuration of a conventional analog majority decision circuit.
As illustrated in FIG. 1, the analog majority decision circuit includes a first current source 110 that receives first data D1<0:3>, a second current source 120 that receives second data D2<0:3>, and first and second nodes N1 and N2 that each have a voltage at the node determined as a comparison result of the number of bits having the logical value ‘1’ (or ‘0’) among the respective first data D1<0:3> and the second data D2<0:3>. In addition, the analog majority decision circuit includes a common transistor T_COM connected to a common node COM that is turned on or turned off by an enable signal EN.
The first current source 110 determines an amount of current that flows in the first node N1 in response to the first data D1<0:3>, wherein the voltage of the first node N1 is determined by a voltage drop occurring in a first resistor R1 due to the current. Further, the second current source 120 determines an amount of current that flows in the second node N2 in response to the second data D2<0:3>, wherein the voltage of the second node N2 is determined by a voltage drop generated in a second resistor R2 due to the current. According to an example, the first current source 110 includes a plurality of first transistors T1_0 to T1_3 that are each turned on/off depending on the logical value of the respective bit input thereto among the first data D1<0:3> and the second current source 120 includes a plurality of second transistors T2_0 to T2_3 that are each turned on/off depending on the logical value of the respective bit input thereto among the second data D2<0:3>.
The analog majority decision circuit is activated or inactivated by the enable signal EN. If the common transistor T_COM is turned on by the activation (‘high’) of the enable signal EN, current flows in the first node N1 and the second node N2 through the common node COM by the first current source 110 and the second current source 120, respectively, and therefore, the analog majority decision circuit performs a majority decision operation on the input first data D1<0:3> and second data D2<0:3>. If the common transistor T_COM is turned off by the inactivation of the enable signal EN (‘low’), current does not flow through the common node COM and thus, the voltage drop due to the first and second resistors R1 and R2 does not occur. Therefore, the analog majority decision circuit does not perform the majority decision operation. Here, the majority decision operation means an operation that decides whether any one of the input data D1<0:3> and D2<0:3> has more bits having the specific logical value.
The operation of the analog majority decision circuit illustrated in FIG. 1 is as follows.
If it is determined that the number of bits having the logical value ‘1’ among the first data D1<0:3> is more than the number of bits having the logical value ‘1’ among the second data D2<0:3>, the number of transistors that is turned on among the plurality of first transistors T1_0 to T1_3 is more than the number of transistors that is turned on among the plurality of second transistors T2_0 to T2_3, such that the current flowing in the first node N1 is larger than the current flowing in the second node N2. Therefore, the larger voltage drop occurs in the first resistor R1 than in the second resistor R2, such that the voltage of the first node N1 is lower than that of the second node N2. In other words, if the number of bits having the logical value ‘1’ among the first data D1<0:3> is more than the number of bits having the logical value ‘1’ among the second data D2<0:3>, the voltage of the first node N1 is in a ‘low’ level and the voltage of the second node N2 is in a ‘high’ level. On the other hand, if the number of bits having the logical value ‘1’ among the second data D2<0:3> is more than the number of bits having the logical value ‘1’ among the first data D1<0:3>, the voltage of the first node N1 is in the ‘high’ level and the voltage of the second node N2 is in the ‘low’ level.
Here, when the enable signal EN is a clock signal, the analog majority decision circuit is activated in a ‘high’ level period of the clock signal (performing the majority decision operation) and is inactivated in a ‘low’ level period of the clock signal (both of the first node N1 and the second node N2 are in the ‘high’ level’).
The analog majority decision circuit can reduce the number of transistors, circuit area, and power consumption while implementing a high-speed operation. However, the analog majority decision circuit does not output a signal indicating a situation where the number of bits having the logical value ‘1’ among one input data is equal to the number of bits having the logical value ‘1’ among another input data.
On the other hand, the digital majority decision circuit uses two adders that add and output the number of bits having the logical value ‘1’ among the first data D1<0:3> and add and output the number of bits having the logical value ‘1’ among the second data D2<0:3>. Next, the digital majority decision circuit uses a comparator to compare results output from the adders to decide the majority. When the results output from the adders are the same, the comparator activates a signal representing that the number of bits having the logical value ‘1’ among one input data is equal to the number of bits having the logical value ‘1’ among the other input data. However, the implementation of the adder and the comparator is complicated and a larger number of transistors are used, such that the area of the circuit may increase.